set CMSDK_PMU_TOP_BLOCK       9
set CMSDK_PMU_TOP_PMU0 0x0
set CMSDK_PMU_TOP_PMU1 0x4
set CMSDK_PMU_TOP_PMU2 0x8
set CMSDK_PMU_TOP_PMU2A 0xc
set CMSDK_PMU_TOP_PMU3 0x10
set CMSDK_PMU_TOP_PMU4 0x14
set CMSDK_PMU_TOP_PMU5 0x18
set CMSDK_PMU_TOP_PMU6 0x1c
set CMSDK_PMU_TOP_PMU7 0x20
set CMSDK_PMU_TOP_PMU8 0x24
set CMSDK_PMU_TOP_PMU9 0x28
set CMSDK_PMU_TOP_PMU10 0x2c
set CMSDK_PMU_TOP_PMU11 0x30
set CMSDK_PMU_TOP_PMU12 0x34
set CMSDK_PMU_TOP_PMU13 0x38
set CMSDK_PMU_TOP_PMU14 0x3c
set CMSDK_PMU_TOP_PMU15 0x40
set CMSDK_PMU_TOP_PMU_RB0 0x44
set CMSDK_PMU_TOP_PMU_RB1 0x48
set CMSDK_PMU_TOP_CORE_ID 0x4c
